Blinky With PLL project summary


Module Name:
Blinky With PLL
Synthesis:
Lattice LSE


Implementation Name:
impl1
Strategy Name:
Strategy1


Last Process:
Place & Route Design
State:
Failed


Target Device:
LFE5U-12F-6BG381I
Device Family:
ECP5U


Device Type:
LFE5U-12F
Package Type:
CABGA381


Performance grade:
6
Operating conditions:
IND


Logic preference file:
ulx3s_v20.lpf


Physical Preference file:
impl1/Blinky With PLL_impl1.prf


Product Version:
3.12.1.454
Patch Version:



Updated:
2021/12/05 12:27:44


Implementation Location:
C:/FPGA/ULX3S/Blinky_wPLL/impl1


Project File:
C:/FPGA/ULX3S/Blinky_wPLL/Blinky_wPLL.ldf